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Dogan Ulus

Dogan Ulus obtained his B.S. and M.S. in Electrical Engineering from the Bogazici University, Istanbul in 2011 and in 2013, respectively. He completed his Ph.D. thesis, Pattern Matching with Time: Theory and Applications, under the liberal supervision of Oded Maler in the Verimag laboratory, a leading academic institution in verification and model-based design.